In recent years, research and development concerning direct-conversion type receivers (DCR) have been increasingly brisk in the field of radio communications, because of the advantages of higher packing densities, lower costs and simplicity of circuit structures. In addition to e.g. I/f noise, DC offset and IQ mismatch, the principal items to be taken into account in designing a direct-conversion type receiver (DCR) include the second-order intermodulation (IM2). The main cause of the second-order intermodulation (IM2) in a direct-conversion type receiver (DCR) is a down-conversion mixer.
Japanese Unexamined Patent Application Publication No. JP-A-8-8775 discloses a technique for calibrating a mixer in second-order distortion by generating a test signal in a direct-conversion type receiver. Particularly, the patent document JP-A-8-8775 points out, as a parameter to reduce the second-order distortion, the bias voltage of differential pair of mixers with reference to FIG. 2 thereof. Further, JP-A-8-8775 describes a method of creating a signal for inspection for the purpose of tentatively generating the second-order distortion with reference to FIG. 7, and it also describes a sequence for performing the detection and compensation of a nonlinear distortion with reference to FIG. 10.
Japanese Unexamined Patent Application Publication No. JP-A-2008-124965 discloses a technique for generating an RF test signal for calibration of a receive error and then calibrating a receive error (IQ mismatch) involved in I and Q transmit/receive baseband signals in a receive unit of a direct-conversion type receiver for the purpose of reducing the receive error. Particularly, FIG. 4 accompanying the patent document shows an RF test-signal-generating unit operable to generate an RF test signal for calibration of a receive error.
Further, Japanese Unexamined Patent Application Publication No. JP-A-2004-40678 discloses a demodulator arranged so that a circuit for phase error correction and a circuit for amplitude error correction correct a phase error of I and Q transmit/receive baseband signals produced by a quadrature-demodulation circuit and an amplitude error thereof, respectively.
In addition, Japanese Unexamined Patent Application Publication No. JP-A-2008-263594 discloses a technique for compensating the second-order intermodulation distortion (IM2 distortion) by means of a compensation current output from a compensation circuit independent of a path of an RF block including a mixer. The compensation circuit includes: a squaring circuit; a low-pass filter; and a variable-gain amplifier. An output from the RF block, and a compensation current from the variable-gain amplifier of the compensation circuit are supplied to an adder. A transmit power amplifier (PA) and a receive low-noise amplifier (LNA), which work as automatic calibration circuits for compensation, are turned off, a test signal for IM2 calibration is produced by a transmit circuit, and supplied to a receive circuit through a switch. However, according to another embodiment, a test signal generated by an internal signal source in the receive circuit is supplied to the receive circuit through a switch.